Journal: Journal of Electrical and Electronics Research (JEER) , Volume:1, Issue:1, Pages: 17-26 Download pdf
Authors: Khairul Syazwan Mamat, Pyi Phyo Aung, Chia Yee Ooi
Date: 10-2024
Abstract: Better security is essential for IOT devices since more and more devices today are connected and accessing the sensitive data stored in each other. Today’s device authentications in IoT devices are using public and private key cryptography. In this paper, we review the study of Physically Unclonable Functions (PUFs) on embedded SRAMS for secured authentication. The review first categorizes PUFs into categories based on types of devices. Then, we discuss various performance metrics used to evaluate the performance of Static Random-Access Memory Physically Unclonable Functions (SRAM PUFs). This is followed by various methods of improving stability and reliability of the SRAM PUFs before the conclusion.
Keywords: Physically unclonable function; authentication; memory cells; semiconductor memory; reliability.
References:
[1] A. Hassebo and M. Tealab, ‘Global Models of Smart Cities and Potential IoT Applications: A Review’, IoT, vol. 4, no. 3, pp. 366–411, 2023.
[2] B. Liao, Y. Ali, S. Nazir, L. He and H. U. Khan, "Security Analysis of IoT Devices by Using Mobile Computing: A Systematic Literature Review," in IEEE Access, vol. 8, pp. 120331-120350, 2020.
[3] S. Mittal, W.T. Tam, and C. Ko, “Internet of Things: The Pillar of Artificial Intelligence,” Report produced by Asian Insights Office: DBS Group, 2018.
[4] H. Mrabet, S. Belguith, A. Alhomoud, and A. Jemai, “A Survey of IoT Security Based on a Layered Architecture of Sensing and Data Analysis,” Sensors, vol. 20, no. 13, p. 3625, Jun. 2020.
[5] V. A. Thakor, M. A. Razzaque and M. R. A. Khandaker, "Lightweight Cryptography Algorithms for Resource-Constrained IoT Devices: A Review, Comparison and Research Opportunities," in IEEE Access, vol. 9, pp. 28177-28193, 2021.
[6] A. Shamsoshoara, A. Korenda, F. Afghah, and S. Zeadally, ‘A survey on physical unclonable function (PUF)-based security solutions for Internet of Things’, Computer Networks, vol. 183, p. 107593, 2020.
[7] Babaei, Armin ; Schiele, Gregor, A. Babaei, and G. Schiele, “Physical Unclonable Functions in the Internet of Things: State of the Art and Open Challenges,” Sensors, vol. 19, no. 14, p. 3208, 2019.
[8] K. P. Egowda and S. Thomas, "A Detailed Review on Physical Unclonable Function Circuits for Hardware Security," 2018 IEEE 9th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON), Vancouver, BC, Canada, 2018, pp. 609-612.
[9] A. Balan, T. Balan, M. Cirstea, and F. Sandu, “A PUF-based cryptographic security solution for IoT systems on chip,” EURASIP Journal on Wireless Communications and Networking, vol. 2020, no. 1, Nov. 2020.
[10] D. Vinko, K. Miličević, I. Lukić, and M. Köhler, “Microcontroller-Based PUF for Identity Authentication and Tamper Resistance of Blockchain-Compliant IoT Devices,” Sensors, vol. 23, no. 15, p. 6769, Jan. 2023.
[11] B. Gassend, D. R. Clarke, M. Van Dijk, and Srinivas Devadas, “Controlled physical random functions,” Annual Computer Security Applications Conference, Dec. 2002.
[12] B. Gassend, D. Clarke, M. van Dijk, and S. Devadas, ‘Silicon physical random functions’, in Proceedings of the 9th ACM Conference on Computer and Communications Security, Washington, DC, USA, 2002, pp. 148–160.
[13] R. Pappu, “Physical One-Way Functions,” Science, vol. 297, no. 5589, pp. 2026–2030, Sep. 2002.
[14] D. Lim, Lee, Blaise Gassend, G. Edward Suh, M. Van Dijk, and Srinivas Devadas, “Extracting secret keys from integrated circuits,” IEEE Transactions on Very Large-Scale Integration Systems, vol. 13, no. 10, pp. 1200–1205, Oct. 2005.
[15] K. Lounis and M. Zulkernine, “Lessons Learned: Analysis of PUF-based Authentication Protocols for IoT,” Digital Threats: Research and Practice, Sep. 2021.
[16] T. McGrath, I. Bagci, Z. Wang, U. Roedig, and R. Young, ‘A PUF taxonomy’, Applied Physics Reviews, vol. 6, p. 011303, 03 2019.
[17] S. Vinagrero, H. Martin, Alice de Bignicourt, Elena-Ioana Vatajelu, and Giorgio Di Natale, “SRAM-Based PUF Readouts,” Scientific Data, vol. 10, no. 1, May 2023.
[18] M. Laban and M. Drutarovsky, “Leakage free helper data storage in microcontroller based PUF implementation,” Microprocessors and Microsystems, p. 103369, Nov. 2020.
[19] D. E. Holcomb, W. P. Burleson, and K. Fu, ‘Initial SRAM State as a Fingerprint and Source of True Random Numbers for RFID Tags’, 2007.
[20] A. Alheyasat, G. Torrens, S. A. Bota, and B. Alorda, ‘Estimation during Design Phases of Suitable SRAM Cells for PUF Applications Using Separatrix and Mismatch Metrics’, Electronics, vol. 10, no. 12, 2021.
[21] S. E. Thompson and S. Parthasarathy, “Moore’s law: the future of Si microelectronics,” Materials Today, vol. 9, no. 6, pp. 20–25, Jun. 2006.
[22] C.-H. Chang, Chao Qun Liu, L. Zhang, and Zhi Hui Kong, “Sizing of SRAM Cell with Voltage Biasing Techniques for Reliability Enhancement of Memory and PUF Functions,” Journal of Low Power Electronics and Applications, vol. 6, no. 3, pp. 16–16, Aug. 2016.
[23] Y. Shifman, A. Miller, O. Keren, Yoav Weizmann, and J. Shor, “A Method to Improve Reliability in a 65-nm SRAM PUF Array,” IEEE Solid-State Circuits Letters, vol. 1, no. 6, pp. 138–141, Jun. 2018.
[24] P. Van Aubel, D. J. Bernstein, and R. Niederhagen, ‘Investigating SRAM PUFs in large CPUs and GPUs’, in Security, Privacy, and Applied Cryptography Engineering, 2015, pp. 228–247.
[25] F. Wilde, “Large scale characterization of SRAM on infineon XMC microcontrollers as PUF,” Jan. 2017.
[26] C. Lipps, A. Weinand, D. Krummacker, C. Fischer, and H. D. Schotten, “Proof of Concept for IoT Device Authentication Based on SRAM PUFs Using ATMEGA 2560-MCU,” Apr. 2018.
[27] W. Wang, A. D. Singh, and U. Guin, “A Systematic Bit Selection Method for Robust SRAM PUFs,” Journal of Electronic Testing, vol. 38, no. 3, pp. 235–246, Jun. 2022.
[28] S. Elgendy and E. Y. Tawfik, "Impact of Physical Design on PUF Behavior: A Statistical Study," 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea, 2021, pp. 1-5.
[29] Shinohara, H., et al. Analysis and reduction of SRAM PUF Bit Error Rate. In 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT). 2017.
[30] Z. Su et al., "SRAM-Based PUF with Noise Immunity Achieving 0.58% Native BER in 55-nm CMOS," 2024 IEEE International Symposium on Circuits and Systems (ISCAS), Singapore, Singapore, 2024, pp. 1-5.
[31] Z. Su et al., "Reliability Improvement on SRAM Physical Unclonable Function (PUF) Using an 8T Cell in 28 nm FDSOI," in IEEE Transactions on Nuclear Science, vol. 69, no. 3, pp. 333-339, March 2022.
[32] Aung, P.P., et al., Evaluation of SRAM PUF Characteristics and Generation of Stable Bits for IoT Security, in Emerging Trends in Intelligent Computing and Informatics. 2020. p. 441-450.
[33] M. Deutschmann, Lejla Iriskic, Sandra-Lisa Lattacher, M. Münzer, F. Stornig, and Oleksandr Tomashchuk, “Research on the Applications of Physically Unclonable Functions within the Internet of Things,” Aug. 2018.
[34] S. Larimian, M. R. Mahmoodi, and D. B. Strukov, ‘Lightweight integrated design of PUF and TRNG security primitives based on eFlash memory in 55-nm CMOS’, IEEE Transactions on Electron Devices, vol. 67, no. 4, pp. 1586–1592, 2020.
[35] Schaub, A., O. Rioul, and J.J. Boutros. Entropy Estimation of Physically Unclonable Functions via Chow Parameters. in 2019 57th Annual Allerton Conference on Communication, Control, and Computing (Allerton). 2019.
[36] P. Saraza-Canflanca, H. Carrasco-Lopez, P. Brox, R. Castro-Lopez, E. Roca and F. V. Fernandez, "Improving the reliability of SRAM-based PUFs in the presence of aging," 2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS), Marrakech, Morocco, 2020, pp. 1-6.
[37] W. Wang, A. Singh, U. Guin, and A. Chatterjee, “Exploiting power supply ramp rate for calibrating cell strength in SRAM PUFs,” Mar. 2018.
[38] A. T. Elshafiey, Payman Zarkesh-Ha, and J. Trujillo, “The effect of power supply ramp time on SRAM PUFs,” UNM’s Digital Repository (University of New Mexico), Aug. 2017.
[39] K. Takeuchi, T. Mizutani, Takuya Saraya, M. Kobayashi, T. Hiramoto, and H. Shinohara, “Measurement of SRAM power-up state for PUF applications using an addressable SRAM cell array test structure,” International Conference on Microelectronic Test Structures, Mar. 2016.
[40] K. Takeuchi, T. Mizutani, H. Shinohara, Takuya Saraya, M. Kobayashi, and T. Hiramoto, “Measurement of Static Random-Access Memory Power-Up State Using an Addressable Cell Array Test Structure,” IEEE Transactions on Semiconductor Manufacturing, vol. 30, no. 3, pp. 209–215, Aug. 2017.
[41] Handschuh, H. Hardware intrinsic security based on SRAM PUFs: Tales from the industry. in 2011 IEEE International Symposium on Hardware-Oriented Security and Trust. 2011.
[42] M.-S. Kim et al., “Error reduction of SRAM-based physically unclonable function for chip authentication,” International Journal of Information Security, vol. 22, no. 5, pp. 1087–1098, Feb. 2023.
[43] Chen, B., et al. A Robust SRAM-PUF Key Generation Scheme Based on Polar Codes. in GLOBECOM 2017 - 2017 IEEE Global Communications Conference. 2017.
[44] S. S. Kudva et al., "16.4 High-Density and Low-Power PUF Designs in 5nm Achieving 23× and 39× BER Reduction After Unstable Bit Detection and Masking," 2024 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2024, pp. 302-304.
[45] M. Laban and Milos Drutarovsky, “Improved Efficiency of PUF Response Reconstruction Method,” Apr. 2020.
[46] Li, B. and S. Chen, A dynamic PUF anti-aging authentication system based on restrict race code. Science China Information Sciences, 2015. 59(1): p. 1-12.
[47] Neale, A. and M. Sachdev. A low energy SRAM-based physically unclonable function primitive in 28 nm CMOS. in 2015 IEEE Custom Integrated Circuits Conference (CICC). 2015.
[48] Yue, M. (2024). A Two-Stage TMV SRAM PUF Preselection Method with Fewer ECC Resources. 2024 IEEE 7th Advanced Information Technology, Electronic and Automation Control Conference (IAEAC), 7, 528–533.
[49] Liu, H., et al., Methods for Estimating the Convergence of Inter-Chip Min-Entropy of SRAM PUFs. IEEE Transactions on Circuits and Systems I: Regular Papers, 2018. 65(2): p. 593-605.
[50] A. Ali Pour et al., "Helper Data Masking for Physically Unclonable Function-Based Key Generation Algorithms," in IEEE Access, vol. 10, pp. 40150-40164, 2022.
[51] M. Laban and M. Drutarovsky, “Leakage free helper data storage in microcontroller based PUF implementation,” Microprocessors and Microsystems, p. 103369, Nov. 2020.
[52] R. Karmakar, G. Kaddoum and O. Akhrif, "A PUF and Fuzzy Extractor-Based UAV-Ground Station and UAV-UAV Authentication Mechanism With Intelligent Adaptation of Secure Sessions," in IEEE Transactions on Mobile Computing, vol. 23, no. 5, pp. 3858-3875, May 2024.
[53] M. Gong, H. Zhang, C. Wang, Q. Tong, and Z. Liu, “Design and implementation of robust and low-cost SRAM PUF using PMOS and linear shift register extractor,” Microelectronics Journal, vol. 103, pp. 104844–104844, Sep. 2020.
[54] K. Liu, X. Chen, H. Pu and H. Shinohara, "A 0.5-V Hybrid SRAM Physically Unclonable Function Using Hot Carrier Injection Burn-In for Stability Reinforcement," in IEEE Journal of Solid-State Circuits, vol. 56, no. 7, pp. 2193-2204, July 2021.
[55] Liu, K., et al. A 373 F2 2D Power-Gated EE SRAM Physically Unclonable Function With Dark-Bit Detection Technique. in 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC). 2018.
[56] Miller, A., et al. A Highly Reliable SRAM PUF with a Capacitive Preselection Mechanism and pre-ECC BER of 7.4E-10. in 2019 IEEE Custom Integrated Circuits Conference (CICC). 2019.
[57] Shifman, Y., et al. An SRAM PUF with 2 Independent Bits/Cell in 65nm. In 2019 IEEE International Symposium on Circuits and Systems (ISCAS). 2019.
[58] Liu, C.Q., Y. Zheng, and C. Chang. A new write-contention based dual-port SRAM PUF with multiple response bits per cell. in 2017 IEEE International Symposium on Circuits and Systems (ISCAS). 2017.
[59] Mispan, M.S., et al., A reliable PUF in a dual function SRAM. Integration, 2019. 68: p. 12-21.
[60] L. Lu, T. Yoo and T. T. -H. Kim, "A 6T SRAM Based Two-Dimensional Configurable Challenge-Response PUF for Portable Devices," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 6, pp. 2542-2552, June 2022.
[61] Van Khanh Pham, Chi Trung Ngo, J.-W. Nam, and J.-P. Hong, “A Reconfigurable SRAM CRP PUF with High Reliability and Randomness,” Electronics, vol. 13, no. 2, pp. 309–309, Jan. 2024.
[62] A. Listl, D. Mueller-Gritschneder, U. Schlichtmann and S. R. Nassif, "SRAM Design Exploration with Integrated Application-Aware Aging Analysis," 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), Florence, Italy, 2019, pp. 1249-1252.
[63] Shayesteh Masoumian, Georgios Selimis, R. Maes, Geert-Jan Schrijen, Said Hamdioui, and Mottaqiallah Taouil, “Modeling Static Noise Margin for FinFET based SRAM PUFs,” Data Archiving and Networked Services (DANS), May 2020.
[64] H. Zhang et al., “A Dynamic Highly Reliable SRAM-Based PUF Retaining Memory Function,” Research Portal (Queen’s University Belfast), May 2021.
[65] Z. Su et al., "Reliability Improvement on SRAM Physical Unclonable Function (PUF) Using an 8T Cell in 28 nm FDSOI," in IEEE Transactions on Nuclear Science, vol. 69, no. 3, pp. 333-339, March 2022.
[66] Su Z, Li B, Liu C, et al. SRAM-Based PUF with Noise Immunity Achieving 0.58% Native BER in 55-nm CMOS. In: 2024 IEEE International Symposium on Circuits and Systems (ISCAS), 2024:1-5.
[67] Garg, A., et al., Improving uniformity and reliability of SRAM PUFs utilizing device aging phenomenon for unique identifier generation. Microelectronics Journal, 2019. 90: p. 29-38.
[68] Kim, M., et al. Leveraging Circuit Reliability Effects for Designing Robust and Secure Physical Unclonable Functions. in 2019 IEEE International Electron Devices Meeting (IEDM). 2019.
[69] Islam, M.N., V.C. Patil, and S. Kundu, On Enhancing Reliability of Weak PUFs via Intelligent Post-Silicon Accelerated Aging. IEEE Transactions on Circuits and Systems I: Regular Papers, 2018. 65(3): p. 960-969.
[70] Clark, L.T., et al., Physically Unclonable Functions Using Foundry SRAM Cells. IEEE Transactions on Circuits and Systems I: Regular Papers, 2019. 66(3): p. 955-966.
[71] Trujillo, J., C. Merino, and P. Zarkesh-Ha. SRAM Physically Unclonable Functions Implemented on Silicon Germanium. in 2019 IEEE International Symposium on Circuits and Systems (ISCAS). 2019.
[72] Zhang, S., et al. Evaluation and optimization of physical unclonable function (PUF) based on the variability of FinFET SRAM. in 2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC). 2017.
[73] Narasimham, B., et al. SRAM PUF quality and reliability comparison for 28 nm planar vs. 16 nm FinFET CMOS processes. in 2017 IEEE International Reliability Physics Symposium (IRPS). 2017.
[74] Masoumian, S., Selimis, G., Wang, R., Schrijen, G.-J., Hamdioui, S., & Taouil, M. Reliability Analysis of FinFET-Based SRAM PUFs for 16nm, 14nm, and 7nm Technology Nodes. 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2022. 1189–1192.
[75] Liao, Z. and Y. Guan. The Cell Dependency Analysis on Learning SRAM Power-Up States. in 2018 Asian Hardware Oriented Security and Trust Symposium (AsianHOST). 2018.
[76] Liao, Z., et al. The impact of discharge inversion affects learning SRAM power-up statistics. in 2017 Asian Hardware Oriented Security and Trust Symposium (AsianHOST). 2017.
[77] Z. Liao and Y. Guan, ‘Rudba: Reusable user-device biometric authentication scheme for multi-service systems’, in 2021 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2021, pp. 214–225.
[78] Alheyasat, A., et al. Weak and Strong SRAM cells analysis in embedded memories for PUF applications. in 2019 XXXIV Conference on Design of Circuits and Integrated Systems (DCIS). 2019.
[79] Elena Ioana Vatajelu, Giorgio Di Natale, and P. Prinetto, “Towards a Highly Reliable SRAM-based PUFs,” HAL (Le Centre pour la Communication Scientifique Directe), Jan. 2016.
[80] Saraza-Canflanca, P., et al. Improving the reliability of SRAM-based PUFs in the presence of aging. in 2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS). 2020.
[81] J. Lee, D.-W. Jee, and D. Jeon, ‘Power-up control techniques for reliable SRAM PUF’, IEICE Electron. Express, vol. 16, p. 20190296, 2019.
[82] W. Liu, Z. Lu, H. Liu, R. Min, Z. Zeng and Z. Liu, "A Novel Security Key Generation Method for SRAM PUF Based on Fourier Analysis," in IEEE Access, vol. 6, pp. 49576-49587, 2018.
[83] Y. Shifman, A. Miller, O. Keren, Y. Weizman and J. Shor, "A Method to Utilize Mismatch Size to Produce an Additional Stable Bit in a Tilting SRAM-Based PUF," in IEEE Access, vol. 8, pp. 219137-219150, 2020.
[84] S. Park, M. Jeong, J. Kim, D. Kim and Y. Lee, "A 6T-SRAM-Based Physically-Unclonable-Function with Low BER Through Automated Maximum Mismatch Detection," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, no. 7, pp. 3493-3497, July 2024
[85] S. Baek, G. -H. Yu, J. Kim, C. T. Ngo, J. K. Eshraghian and J. -P. Hong, "A Reconfigurable SRAM Based CMOS PUF With Challenge to Response Pairs," in IEEE Access, vol. 9, pp. 79947-79960, 2021
[86] Pyi Phyo Aung, Nordinah Ismail, Chia Yee Ooi, Koichiro Mashiko, Hau Sim Choo, and Takanori Matsuzaki, “Data Remanence Based Approach towards Stable Key Generation from Physically Unclonable Function Response of Embedded SRAMs using Binary Search”, J. Adv. Res. Appl. Sci. Eng. Tech., vol. 35, no. 2, pp. 114–131, Dec. 2023.
[87] A. Santana-Andreo, P. Saraza-Canflanca, R. Castro-Lopez, E. Roca, and F. V. Fernandez, “Reliability improvement of SRAM PUFs based on a detailed experimental study into the stochastic effects of aging,” AEU - International Journal of Electronics and Communications, vol. 176, pp. 155147–155147, Mar. 2024.